74HC154 (4-to-16 Decoder/Demultiplexer)

4 to 16 Line Decoder/Demultiplexer.(DIP-24)
Description
Each of these 4-line-to-16-line decoders utilizes TTL circuitry to decode four binary-coded inputs into one of sixteen mutually exclusive outputs when both the strobe inputs, G1 and G2, are low. The demultiplexing function is performed by using the 4 input lines to address the output line, passing data from one of the strobe inputs with the other strobe input low. When either strobe input is high, all outputs are high. These demultiplexers are ideally suited for implementing high-performance memory decoders. All inputs are buffered and input clamping diodes are provided to minimize transmission-line effects and thereby simplify system design.

Features:-
Decodes 4 binary-coded inputs into one of 16 mutually exclusive outputs
Performs the demultiplexing function by distributing data from one input line to any one of 16 outputs
Input clamping diodes simplify system design
High fan-out, low-impedance, totem-pole outputs
Typical propagation delay 3 levels of logic 23 ns Strobe 19 ns
Typical power dissipation 170 mW
Connection Diagram

Specifications:-
Family L.S.
Circuit logic type Decoder/Demultiplexer
Number of outputs 16
Minimum supply voltage 4.75V
Maximum supply voltage 5.25V
High output current 0.8mA
Minimum operating temperature 0°C
Maximum operating temperature 70°C
74LS154 Function Table

Logic Diagram
74LS154 Circuit Diagram