74HC295 (8-Bit Addressable Latch)

They are multifunctional devices capable of storing single-line data in eight addressable latches. They provide a 3-to-8 decoder and multiplexer function with active HIGH outputs (Q0 to Q7). 

They also incorporate an active LOW common reset (MR) for resetting all latches as well as an active LOW enable input (LE).

The 74HC295 has four modes of operation:

• Addressable latch mode, in this mode data on the data line (D) is written into the addressed latch. The addressed latch follows the data input with all non-addressed latches remaining in their previous states.

• Memory mode, in this mode all latches remain in their previous states and are unaffected by the data or address inputs.

• Demultiplexing mode (or 3-to-8 decoding), in this mode the addressed output follows the state of the data input (D) with all other outputs in the LOW state.

• • Reset mode, in this mode all outputs are LOW and unaffected by the address inputs (A0 to A2) and data input (D).